Intel® Product Specification Comparison
03/29/2025 01:56:39 PM
 ,Intel® Stratix® 10 TX 1650 FPGA ,Intel® Stratix® 10 TX 2500 FPGA ,Intel® Stratix® 10 TX 2100 FPGA ,Intel® Stratix® 10 TX 850 FPGA ,Intel® Stratix® 10 TX 400 FPGA ,Intel® Stratix® 10 TX 1100 FPGA ,Intel® Stratix® 10 TX 2800 FPGA 
Essentials
Marketing Status,Launched,Launched,Launched,Launched,Launched,Launched,Launched
Launch Date,Q1'18,Q1'18,Q1'18,Q1'18,Q1'18,Q1'18,Q1'18
Lithography,14 nm,14 nm,14 nm,14 nm,14 nm,14 nm,14 nm

Resources
Logic Elements (LE),1679000,2422000,2073000,841000,378000,1325000,2753000
Adaptive Logic Modules (ALM),569200,821150,702720,284960,128160,449280,933120
Adaptive Logic Module (ALM) Registers,2276800,3284600,2810880,1139840,512640,1797120,3732480
Fabric and I/O Phase-Locked Loops (PLLs),16,24,16,16,8,16,24
Maximum Embedded Memory,223.5 Mb,208 Mb,239.5 Mb,72 Mb,32 Mb,114 Mb,244 Mb
Digital Signal Processing (DSP) Blocks,3326,5011,3960,2016,648,2592,5760
Digital Signal Processing (DSP) Format,Multiply and Accumulate |  Variable Precision |  Fixed Point (hard IP) |  Floating Point (hard IP),Multiply and Accumulate |  Variable Precision |  Fixed Point (hard IP) |  Floating Point (hard IP),Multiply and Accumulate |  Variable Precision |  Fixed Point (hard IP) |  Floating Point (hard IP),Multiply and Accumulate |  Variable Precision |  Fixed Point (hard IP) |  Floating Point (hard IP),Multiply and Accumulate |  Variable Precision |  Fixed Point (hard IP) |  Floating Point (hard IP),Multiply and Accumulate |  Variable Precision |  Fixed Point (hard IP) |  Floating Point (hard IP),Multiply and Accumulate |  Variable Precision |  Fixed Point (hard IP) |  Floating Point (hard IP)
Hard Memory Controllers,Yes,Yes,Yes,Yes,Yes,Yes,Yes
External Memory Interfaces (EMIF),DDR4 |  DDR3 |  DDR2 |  DDR |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3 |  HMC |  MoSys,DDR4 |  DDR3 |  DDR2 |  DDR |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3 |  HMC |  MoSys,DDR4 |  DDR3 |  DDR2 |  DDR |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3 |  HMC |  MoSys,DDR4 |  DDR3 |  DDR2 |  DDR |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3 |  HMC |  MoSys,DDR4 |  DDR3 |  DDR2 |  DDR |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3 |  HMC |  MoSys,DDR4 |  DDR3 |  DDR2 |  DDR |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3 |  HMC |  MoSys,DDR4 |  DDR3 |  DDR2 |  DDR |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3 |  HMC |  MoSys
Hard Processor System (HPS),,Quad-core 64-bit ARM* Cortex*-A53,,Quad-core 64-bit ARM* Cortex*-A53,Quad-core 64-bit ARM* Cortex*-A53,Quad-core 64-bit ARM* Cortex*-A53,Quad-core 64-bit ARM* Cortex*-A53

I/O Specifications
Maximum User I/O Count†,440,440,440,440,392,440,440
I/O Standards Support,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3V LVCMOS |   SSTL |  POD |  HSTL |  HSUL |  Differential SSTL |  Differential POD |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3V LVCMOS |   SSTL |  POD |  HSTL |  HSUL |  Differential SSTL |  Differential POD |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3V LVCMOS |   SSTL |  POD |  HSTL |  HSUL |  Differential SSTL |  Differential POD |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3V LVCMOS |   SSTL |  POD |  HSTL |  HSUL |  Differential SSTL |  Differential POD |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3V LVCMOS |   SSTL |  POD |  HSTL |  HSUL |  Differential SSTL |  Differential POD |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3V LVCMOS |   SSTL |  POD |  HSTL |  HSUL |  Differential SSTL |  Differential POD |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3V LVCMOS |   SSTL |  POD |  HSTL |  HSUL |  Differential SSTL |  Differential POD |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL
Maximum LVDS Pairs,216,216,216,216,192,216,216
Maximum Non-Return to Zero (NRZ) Transceivers†,96,144,96,72,24,72,144
Maximum Non-Return to Zero (NRZ) Data Rate†,28.9 Gbps,28.9 Gbps,28.9 Gbps,28.9 Gbps,28.9 Gbps,28.9 Gbps,28.9 Gbps
Maximum Pulse-Amplitude Modulation (PAM4) Transceivers†,36,60,36,24,12,24,60
Maximum Pulse-Amplitude Modulation (PAM4) Data Rate†,57.8 Gbps,57.8 Gbps,57.8 Gbps,57.8 Gbps,57.8 Gbps,57.8 Gbps,57.8 Gbps
Transceiver Protocol Hard IP,PCIe Gen3 |  10/25/100G Ethernet,PCIe Gen3 |  10/25/100G Ethernet,PCIe Gen3 |  10/25/100G Ethernet,PCIe Gen3 |  10/25/100G Ethernet,10/25/100G Ethernet,PCIe Gen3 |  10/25/100G Ethernet,PCIe Gen3 |  10/25/100G Ethernet

Advanced Technologies
Hyper-Registers,Yes,Yes,Yes,Yes,Yes,Yes,Yes
FPGA Bitstream Security,Yes,Yes,Yes,Yes,Yes,Yes,Yes

Package Specifications
Package Options,F2397,F2397 |  F2912,F2397,F1760 |  F2397,F1152,F1760 |  F2397,F2397 |  F2912

Supplemental Information
Additional Information,Product Table (Family Comparison) Datasheet All FPGA Documentation,Product Table (Family Comparison) Datasheet All FPGA Documentation,Product Table (Family Comparison) Datasheet All FPGA Documentation,Product Table (Family Comparison) Datasheet All FPGA Documentation,Product Table (Family Comparison) Datasheet All FPGA Documentation,Product Table (Family Comparison) Datasheet All FPGA Documentation,Product Table (Family Comparison) Datasheet All FPGA Documentation
