Intel® Product Specification Comparison
04/09/2025 03:48:30 PM
 ,Arria® V 5ASTD3 FPGA ,Arria® V 5ASTD5 FPGA 
Essentials
Marketing Status,Launched,Launched
Launch Date,2013,2013
Lithography,28 nm,28 nm

Resources
Logic Elements (LE),350000,462000
Adaptive Logic Modules (ALM),132075,174340
Adaptive Logic Module (ALM) Registers,528300,697360
Fabric and I/O Phase-Locked Loops (PLLs),14,14
Maximum Embedded Memory,19.304 Mb,25.478 Mb
Digital Signal Processing (DSP) Blocks,809,1090
Digital Signal Processing (DSP) Format,Variable Precision,Variable Precision
Hard Processor System (HPS),Dual-core Arm* Cortex*-A9,Dual-core Arm* Cortex*-A9
Hard Memory Controllers,Yes,Yes
External Memory Interfaces (EMIF),DDR II+ |  DDR2 |  DDR3 |  LPDDR |  LPDDR2 |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3,DDR II+ |  DDR2 |  DDR3 |  LPDDR |  LPDDR2 |  QDR II |  QDR II+ |  RLDRAM II |  RLDRAM 3

I/O Specifications
Maximum User I/O Count†,540,540
I/O Standards Support,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3 V LVCMOS |  PCI |  PCI-X |  SSTL |  HSTL |  HSUL |  Differential SSTL |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL,3.0 V to 3.3 V LVTTL |  1.2 V to 3.3 V LVCMOS |  PCI |  PCI-X |  SSTL |  HSTL |  HSUL |  Differential SSTL |  Differential HSTL |  Differential HSUL |  LVDS |  Mini-LVDS |  RSDS |  LVPECL
Maximum LVDS Pairs,256,256
Maximum Non-Return to Zero (NRZ) Transceivers†,46,46
Maximum Non-Return to Zero (NRZ) Data Rate†,10.3125 Gbps,10.3125 Gbps
Transceiver Protocol Hard IP,PCIe Gen2,PCIe Gen2

Advanced Technologies
FPGA Bitstream Security,Yes,Yes
Analog-to-Digital Converter,No,No

Package Specifications
Package Options,F896 |  F1152 |  F1517,F896 |  F1152 |  F1517

Supplemental Information
Additional Information,Product Table (Family Comparison) Datasheet All FPGA Documentation,Product Table (Family Comparison) Datasheet All FPGA Documentation
